1. Field of the Invention
The present invention relates to solid-state imaging devices, and cameras, and more particularly relates to a solid-state imaging device in which positional relations between light sensing units and interconnection layers vary periodically, and a camera equipped with such a solid-state imaging device.
2. Description of the Related Art
In recent years, a CMOS-type solid-state imaging device, to which CMOS (complementary metal oxide semiconductor) technology, which is one of standard technologies for IC manufacturing is applied, has been in widespread use.
Being different from a CCD (charge coupled device)-type solid-state imaging device, a CMOS-type solid-state imaging device does not use high driving voltages, and can be integrated (disposed on-chip) with peripheral circuits, which brings about a great advantage to miniaturization of the solid-state imaging device.
In addition, miniaturization and multiple-pixel structuration of chips are currently desired for CMOS-type solid-state imaging devices. However, the miniaturization of the chips while the size of the pixels remains as it is leads to a decrease in the number of pixels used in a CMOS-type solid-state imaging device, with the result that the resolution of the solid-state imaging device decreases. On the other hand, the multiple-pixel structuration of the chips while the size of the pixels remains as it is leads to large-size chips, with the result that the cost of production increases or the yield of the chips decreases.
Therefore, it is necessary that the size of the pixel is made smaller than it is now to implement miniaturization and multiple-pixel structuration of the chips. If miniaturization of the size of the pixel is achieved, a smaller CMOS-type solid-state imaging device with the same resolution can be provided, or instead the resolution can be improved while the size of the device remains as it is.
When the size of the pixel is reduced, however, a problem occurs in that the amount of light entering each pixel is reduced and the sensitivity characteristic of the light sensing unit of the pixel is deteriorated. There is a method for maintaining the sensitivity characteristic by increasing the conversion efficiency of an output circuit. In this case, however, noise components are also amplified.
Therefore, S/N ratios of video signals output from the CMOS-type solid-state imaging device are deteriorated. In other words, it is generally difficult to maintain the sensitivity characteristic by increasing the photoelectric conversion efficiency when the size of the pixels is reduced, thereby it becomes necessary to improve the light-collection efficiency of each pixel in order to prevent S/N ratios of the video signals from being deteriorated.
From such a viewpoint, some devices, in which light-collection efficiency of a light sensing unit is improved by disposing on-chip lenses (OCLs) on a color filter mounted over the light sensing unit, have been proposed as disclosed, for example, in Japanese Unexamined Patent Application Publication Nos. 2002-76322, 2002-151670, and 2005-116939.
A CMOS sensor includes plural pixels arranged in a matrix, and typically a readout gate, a charge-voltage conversion unit, a reset gate, an amplifier, and the like as well as a light sensing unit are included in the region of each pixel, thereby it has been said that the reduction of the size of the pixel is difficult.
Recently, however, a so-called component-shared-by-plural-pixels structure has been proposed (See, for example, Japanese Unexamined Patent Application Publication No. 2006-54276), where the areas occupied by components other than the light sensing unit in each pixel can be reduced by these components, which were originally mounted on each pixel, being shared by plural pixels. Such a technology has been becoming an important technology for realizing the reduction of the size of pixels used in CMOS-type solid-state imaging devices.